############################################################################## # Class: TMbsUnpackTofPar # Context: TestDefaultContext ############################################################################## [TMbsUnpackTofPar] //---------------------------------------------------------------------------- //******************************// // Input selector // //******************************// // GETEVT__FILE 1 <- LMD File // GETEVT__STREAM 2 <- Stream client // GETEVT__TRANS 3 <- Transport client // GETEVT__EVENT 4 <- Event client // GETEVT__REVSERV 5 <- Remote event client MbsSourceMode: Int_t 2 // Switch ON/OFF the writing of data in the output root file of cbmroot analysis WriteDataInCbmOut: Int_t 0 // Switch ON/OFF debug tests in VFTX unpacker VftxDebug: Int_t 0 // Number of possible VME boards in the MBS event MbsNbVmeBoards: Int_t 0 //MbsVmeMapping: Int_t \ // Number of possible Non-VME boards in the MBS event NbNonVmeBoards: Int_t 88 //============================================================================== // General structure // BoardIndex Active RocIndx AddMod TokenA TokenB Type //------------------------------------------------------------------------------ // BoardTypes // 0: unknown -- default // 4: get4 -- GET4 chips // 30: trbseb -- subevent builder on central TRB-FPGA // 31: trbtdc -- TDC on peripheral TRB-FPGA or FEE-TDC // 32: trbhub -- hub on peripheral TRB-FPGA //============================================================================== // NonVmeMapping: Int_t \ 0, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 1, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 2, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 3, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 4, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 5, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 6, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 7, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 8, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 9, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 10, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 11, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 12, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 13, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 14, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 15, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 16, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 17, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 18, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 19, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 20, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 21, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 22, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 23, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 24, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 25, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 26, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 27, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 28, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 29, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 30, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 31, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 32, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 33, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 34, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 35, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 36, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 37, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 38, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 39, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 40, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 41, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 42, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 43, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 44, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 45, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 46, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 47, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 48, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 49, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 50, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 51, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 52, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 53, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 54, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 55, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 56, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 57, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 58, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 59, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 60, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 61, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 62, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 63, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 64, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 65, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 66, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 67, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 68, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 69, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 70, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 71, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 72, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 73, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 74, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 75, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 76, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 77, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 78, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 79, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 80, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 81, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 82, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 83, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 84, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 85, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 86, 0x1, 0x0000, 0x0, 0x0, 0x0, 4, \ 87, 0x1, 0x0000, 0x0, 0x0, 0x0, 4 // // Trigger from the Triglog board for which event are jump by Calib, mapping and conv // For now only jumping work for GET4 data!! //TriggerRejection: Int_t 15 TriggerRejection: Int_t -1 //============================================================================== // TriggerChannel | TriggerType | TriggerUnpack //------------------------------------------------------------------------------ // TriggerChannel (as defined in the CTS) // max. range: 0 - 15 //------------------------------------------------------------------------------ // TriggerType (as defined in the CTS) // max. range: 0x0 - 0xf // types generating a reference time signal: 0x0 - 0x7 ("physics triggers") // types without a reference time signal: 0x8 - 0xf // calibration (ToT stretching offset): 0xd // // In case of a trigger concidence, only a uniquely assigned trigger type // allows to unambigously identify the trigger which actually triggered // the event. // All 8 possible trigger signal inputs should have assigned a different // trigger type from 0x0 to 0x7. To all disabled trigger channels, please // assign a higher trigger type (0x8 - 0xf exclusive 0xd). //------------------------------------------------------------------------------ // TriggerUnpack // 0x1: only consider events in which this trigger channel was asserted // (if this unpack bit is set for several trigger channels, all of // them must have been asserted for the event to be unpacked) // 0x0: do not care whether this trigger channel was asserted or not // (if this unpack bit is not set for all trigger channels, each // incoming event is unpacked) //============================================================================== NbCtsTrigChs: Int_t 16 CtsTriggerMap: Int_t \ 0, 0x1, 0x0, \ 1, 0x1, 0x0, \ 2, 0x1, 0x0, \ 3, 0x1, 0x0, \ 4, 0x1, 0x0, \ 5, 0x1, 0x0, \ 6, 0x1, 0x0, \ 7, 0x1, 0x0, \ 8, 0x0, 0x0, \ 9, 0x1, 0x0, \ 10, 0x2, 0x0, \ 11, 0x3, 0x0, \ 12, 0x4, 0x0, \ 13, 0x5, 0x0, \ 14, 0x6, 0x0, \ 15, 0x7, 0x0 // //============================================================================== // The unpacking algorithms support both double edge measurement methods // implemented for the TRB-TDC. // - 128-bit mode: separate edge detection in different TDC channels // 1 TDC TIME and 1 TDC EPOCH word for both edges // - 96-bit mode: joint edge detection in the same TDC channel // 1 TDC TIME word per edge and 1 joint TDC EPOCH word // To enable 96-bit mode unpacking, set 'TrbTdcBitMode' to '1'. Setting any // other value will result in 128-bit mode unpacking. //============================================================================== TrbTdcBitMode: Int_t 1 ###########################