############################################################################## # Class: TMbsUnpackTofPar # Context: TestDefaultContext ############################################################################## [TMbsUnpackTofPar] //---------------------------------------------------------------------------- //******************************// // Input selector // //******************************// // GETEVT__FILE 1 <- LMD File // GETEVT__STREAM 2 <- Stream client // GETEVT__TRANS 3 <- Transport client // GETEVT__EVENT 4 <- Event client // GETEVT__REVSERV 5 <- Remote event client MbsSourceMode: Int_t 2 // Switch ON/OFF the writing of data in the output root file of cbmroot analysis WriteDataInCbmOut: Int_t 1 // Switch ON/OFF debug tests in VFTX unpacker VftxDebug: Int_t 0 // Number of possible VME boards in the MBS event MbsNbVmeBoards: Int_t 8 // BoardTypes // undef = 0, // unknown type, default value // caenV1290 = 1, // CAEN v1290A and CAEN v1290N VME boards based on HPTDC chips // vftx = 2, // FPGA TDC of the VFTX family (E. Bayer dev.) // triglog = 10, // VULOM TRIGLOG board // scalormu = 11, // VULOM Scaler Or Multiplicity board // scalormubig= 12, // VULOM Scaler Or Multiplicity board 32 channel version ? not used for now // scaler2014 = 13, // VULOM Scaler Or/And board used in the GSI April 2014 TOF beamtime // triglogscal= 14, // VULOM TRIGLOG board used as additional scaler board // orgen = 15, // VULOM Or Generation board (nov 2015) with more scalers than scaler2014 // caenv965 = 20, // CAEN v965A and CAEN v965N VME QDC boards // lecroy1182 = 21, // LECROY 1182 VME QDC/ADC board // vulqfwread = 22 // VULOM QFW board (Charge to Frequency Converter Readout) // BoardIndex Active Address AddMod TokenA TokenB Type MbsVmeMapping: Int_t \ 0, 1, 0x03000000, 0x09, 0x74726c6f, 0x6f6c7274, 10, \ 1, 1, 0x04000000, 0x09, 0x504d5453, 0x53544d50, 14, \ 2, 1, 0x05000000, 0x09, 0x73636131, 0x31616373, 15, \ 3, 1, 0x06000000, 0x09, 0x73636132, 0x32616373, 15, \ 4, 1, 0x07000000, 0x09, 0x73636133, 0x33616373, 15, \ 5, 1, 0x08000000, 0x09, 0x73636134, 0x34616373, 15, \ 6, 1, 0x09000000, 0x09, 0x73636135, 0x35616373, 15, \ 7, 1, 0x0A000000, 0x09, 0x73636136, 0x36616373, 15 // Number of possible Non-VME boards in the MBS event NbNonVmeBoards: Int_t 45 //============================================================================== // General structure // BoardIndex Active RocIndx AddMod TokenA TokenB Type //------------------------------------------------------------------------------ // BoardTypes // 0: unknown -- default // 4: get4 -- GET4 chips // 30: trbseb -- subevent builder on central TRB-FPGA // 31: trbtdc -- TDC on peripheral TRB-FPGA or FEE-TDC // 32: trbhub -- hub on peripheral TRB-FPGA //============================================================================== // TRB specific structure // BoardIndex UnpackTdc FpgaAddr [niu] SebAddr FpgaInData FpgaType //------------------------------------------------------------------------------ // BoardIndex: consecutively numbered index (0...NbNonVmeBoards-1) // FpgaInData: FPGA TRBnet endpoint sends data (0x1) // FpgaAddr: FPGA TRBnet endpoint address // [niu]: field not in use // SebAddr: subevent builder's TRBnet endpoint address // UnpackTdc: unpack data from this TDC (0x1) // FpgaType: see BoardTypes above //============================================================================== // NonVmeMapping: Int_t \ 0, 0x0, 0xc000, 0x0, 0xc000, 0x1, 30, \ 1, 0x0, 0xb001, 0x0, 0xc000, 0x1, 32, \ 2, 0x0, 0xb002, 0x0, 0xc000, 0x1, 32, \ 3, 0x0, 0xb003, 0x0, 0xc000, 0x1, 32, \ 4, 0x0, 0xb004, 0x0, 0xc000, 0x1, 32, \ 5, 0x0, 0x8002, 0x0, 0xc000, 0x1, 30, \ 6, 0x0, 0xb021, 0x0, 0x8002, 0x1, 32, \ 7, 0x0, 0xb022, 0x0, 0x8002, 0x1, 32, \ 8, 0x0, 0xb023, 0x0, 0x8002, 0x1, 32, \ 9, 0x0, 0xb024, 0x0, 0x8002, 0x1, 32, \ 10, 0x0, 0x8003, 0x0, 0x8003, 0x1, 30, \ 11, 0x0, 0xb031, 0x0, 0x8003, 0x1, 32, \ 12, 0x0, 0xb032, 0x0, 0x8003, 0x1, 32, \ 13, 0x0, 0xb033, 0x0, 0x8003, 0x1, 32, \ 14, 0x0, 0xb034, 0x0, 0x8003, 0x1, 32, \ 15, 0x0, 0x8004, 0x0, 0x8004, 0x1, 30, \ 16, 0x0, 0xb041, 0x0, 0x8004, 0x1, 32, \ 17, 0x0, 0xb042, 0x0, 0x8004, 0x1, 32, \ 18, 0x0, 0xb043, 0x0, 0x8004, 0x1, 32, \ 19, 0x0, 0xb044, 0x0, 0x8004, 0x1, 32, \ 20, 0x0, 0x8005, 0x0, 0x8005, 0x1, 30, \ 21, 0x0, 0xb051, 0x0, 0x8005, 0x1, 32, \ 22, 0x0, 0xb052, 0x0, 0x8005, 0x1, 32, \ 23, 0x0, 0xb053, 0x0, 0x8005, 0x1, 32, \ 24, 0x0, 0xb054, 0x0, 0x8005, 0x1, 32, \ 25, 0x0, 0x0f11, 0x0, 0xc000, 0x1, 31, \ 26, 0x0, 0x0f12, 0x0, 0xc000, 0x1, 31, \ 27, 0x0, 0x0f13, 0x0, 0xc000, 0x1, 31, \ 28, 0x0, 0x0f14, 0x0, 0xc000, 0x1, 31, \ 29, 0x0, 0x0f21, 0x0, 0x8002, 0x1, 31, \ 30, 0x0, 0x0f22, 0x0, 0x8002, 0x1, 31, \ 31, 0x0, 0x0f23, 0x0, 0x8002, 0x1, 31, \ 32, 0x0, 0x0f24, 0x0, 0x8002, 0x1, 31, \ 33, 0x0, 0x0f41, 0x0, 0x8003, 0x1, 31, \ 34, 0x0, 0x0f42, 0x0, 0x8003, 0x1, 31, \ 35, 0x0, 0x0f43, 0x0, 0x8003, 0x1, 31, \ 36, 0x0, 0x0f44, 0x0, 0x8003, 0x1, 31, \ 37, 0x0, 0x0f51, 0x0, 0x8004, 0x1, 31, \ 38, 0x0, 0x0f52, 0x0, 0x8004, 0x1, 31, \ 39, 0x0, 0x0f53, 0x0, 0x8004, 0x1, 31, \ 40, 0x0, 0x0f54, 0x0, 0x8004, 0x1, 31, \ 41, 0x0, 0x0f61, 0x0, 0x8005, 0x1, 31, \ 42, 0x0, 0x0f62, 0x0, 0x8005, 0x1, 31, \ 43, 0x0, 0x0f63, 0x0, 0x8005, 0x1, 31, \ 44, 0x0, 0x0f64, 0x0, 0x8005, 0x1, 31 // // Trigger from the Triglog board for which event are jump by Calib, mapping and conv // For now only jumping work for GET4 data!! //TriggerRejection: Int_t 15 TriggerRejection: Int_t -1 //============================================================================== // TriggerChannel | TriggerType | TriggerUnpack //------------------------------------------------------------------------------ // TriggerChannel (as defined in the CTS) // max. range: 0 - 15 //------------------------------------------------------------------------------ // TriggerType (as defined in the CTS) // max. range: 0x0 - 0xf // types generating a reference time signal: 0x0 - 0x7 ("physics triggers") // types without a reference time signal: 0x8 - 0xf // calibration (ToT stretching offset): 0xd // // In case of a trigger concidence, only a uniquely assigned trigger type // allows to unambigously identify the trigger which actually triggered // the event. // All 8 possible trigger signal inputs should have assigned a different // trigger type from 0x0 to 0x7. To all disabled trigger channels, please // assign a higher trigger type (0x8 - 0xf exclusive 0xd). //------------------------------------------------------------------------------ // TriggerUnpack // 0x1: only consider events in which this trigger channel was asserted // (if this unpack bit is set for several trigger channels, all of // them must have been asserted for the event to be unpacked) // 0x0: do not care whether this trigger channel was asserted or not // (if this unpack bit is not set for all trigger channels, each // incoming event is unpacked) //============================================================================== NbCtsTrigChs: Int_t 16 CtsTriggerMap: Int_t \ 0, 0x1, 0x0, \ 1, 0x1, 0x0, \ 2, 0x1, 0x0, \ 3, 0x1, 0x0, \ 4, 0x1, 0x0, \ 5, 0x1, 0x0, \ 6, 0x1, 0x0, \ 7, 0x1, 0x0, \ 8, 0x0, 0x0, \ 9, 0x1, 0x0, \ 10, 0x2, 0x0, \ 11, 0x3, 0x0, \ 12, 0x4, 0x0, \ 13, 0x5, 0x0, \ 14, 0x6, 0x0, \ 15, 0x7, 0x0 // //============================================================================== // The unpacking algorithms support both double edge measurement methods // implemented for the TRB-TDC. // - 128-bit mode: separate edge detection in different TDC channels // 1 TDC TIME and 1 TDC EPOCH word for both edges // - 96-bit mode: joint edge detection in the same TDC channel // 1 TDC TIME word per edge and 1 joint TDC EPOCH word // To enable 96-bit mode unpacking, set 'TrbTdcBitMode' to '1'. Setting any // other value will result in 128-bit mode unpacking. //============================================================================== TrbTdcBitMode: Int_t 1 ###########################