///////////////////////////////////////////////////////////// // // HTrb3TdcUnpacker // // This is class to unpack and calibrate data of single FPGA TDC // It should be similar to functionality of hadaq::TdcProcessor from 'stream' framework // ///////////////////////////////////////////////////////////// #ifndef HTRB3TDCUNPACKER_H #define HTRB3TDCUNPACKER_H #include "htrb3unpacker.h" #include "htrb3calpar.h" #include "hades.h" #include "hevent.h" #include "heventheader.h" #include "TObject.h" #include #include class HTrb3CalparTdc; class HTrb3TdcUnpacker : public HTrb3Unpacker { #define REFCHAN 0 //#define USE_FILLED_TDC 1 // switch to use list of TDCs with data only (CAUTION: TDC with missing ref time will not emmit warnings if they don't transport data) public: struct ChannelRec { Double_t rising_tm[10]; Double_t falling_tm[10]; UInt_t rising_mult; UInt_t falling_mult; Bool_t hasData; ChannelRec() : rising_mult(0), falling_mult(0), hasData(kFALSE) {} void clear() { rising_mult = 0; falling_mult = 0; hasData = kFALSE; } void addHit(Bool_t rising, Double_t tm) { if (rising) { if (rising_mult < 10) rising_tm[rising_mult++] = tm; } else { if (falling_mult < 10) falling_tm[falling_mult++] = tm; } hasData = kTRUE; } Double_t getHit(Bool_t rising, UInt_t cnt) { return rising ? (cnt0 ? rising_tm[rising_mult-1] : 0.) : (falling_mult>0 ? falling_tm[falling_mult-1] : 0.); } void substractRefTime(Double_t reftm) { if(rising_mult>10) { // std::cout<<"Warning: found rising mult " <10) { /*std::cout<<"Warning: found fallingmult "<< falling_mult<chanList; // list of channels containing data (if USE_FILLED_TDC is defined) Bool_t fhasData ; //! /** JAM2021: ctor checks if numchans are in allowed range */ TDC(size_t numchannels=maxchan) : pSubEvtId(0), fTdcId(0), nChan(numchannels<= maxchan ? numchannels : maxchan), fNcalibr(0), fFoundInStream(kFALSE) { chanList.reserve(maxchan); } void clear() { for (UInt_t i = 0; i < nChan; ++i) fCh[i].clear(); chanList.clear(); fhasData = kFALSE; } Bool_t hasData() { for (UInt_t ch=0;ch=numChannels()) return kFALSE; if(!fhasData) return kTRUE; if(!fFoundInStream) return kTRUE; // skipp empty data if(fTdcId==0) { std::cout<<"Warning: subevent 0x"<< std::hex<< pSubEvtId << " has not configured tdc id!" << std::endl; return kTRUE; // JAM2021: workaround for not configured unpacker LUT? } if (fCh[refch].rising_mult<=0) { Long_t seqnum = -1; if (gHades != 0 && gHades->getCurrentEvent() != 0 && gHades->getCurrentEvent()->getHeader() != 0) { seqnum = gHades->getCurrentEvent()->getHeader()->getEventSeqNumber(); } cerr << " Warning: No reference time for trb=0x" << hex << getTrbAddr() << " sub event 0x" << pSubEvtId << dec << " in evt seq=" << seqnum << endl; return kFALSE; } Double_t reftm = fCh[refch].rising_tm[0]; for (UInt_t ch=0;ch fCalpars; std::vector fTDCs; //! std::vector factiveTDCs; //! list of TDCs found in the data stream std::vector fFilledTDCs; //! if USE_FILLED_TDC is defined this list contains TDC with data std::map fTDCsMap; //! Int_t nCalSrc; //! 0 -auto, 1 - no calibration, 2 - calpar, 3 - DAQ UInt_t fMinAddress; //!< for check of address range when autoregistration of tdcs UInt_t fMaxAddress; //!< for check of address range when autoregistration of tdcs Bool_t fUseTDCFromLookup; //! kTRUE : list of TDC build from lookup table, kFALSE : autoregister mode Double_t fTimeShift; //shift all times by a constant (to positive). Pendant to trb2 unpacker timeShift JAM Int_t getEventSeqNumber(); void addCalpar(UInt_t id1, HTrb3CalparTdc*); public: HTrb3TdcUnpacker(vector& ids); virtual ~HTrb3TdcUnpacker(); virtual Bool_t reinit(); UInt_t numTDC () const { return fTDCs.size(); } TDC * getTDC (UInt_t n) { return &(fTDCs[n]); } UInt_t numActiveTDC() const { return factiveTDCs.size(); } TDC * getActiveTDC(UInt_t n) { return &(fTDCs[factiveTDCs[n]]); } UInt_t numFilledTDC() const { return fFilledTDCs.size(); } TDC * getFilledTDC(UInt_t n) { return &(fTDCs[fFilledTDCs[n]]); } /** preassign tdc of expected trbnet address. returns index in map*/ Int_t addTDC(UInt_t trbaddr, size_t numchannels=maxchan); void setCalibrationSource(UInt_t s) { nCalSrc = s; } Bool_t scanTdcData(UInt_t trbaddr, UInt_t* data, UInt_t datalen); Bool_t correctRefTimeCh(UInt_t ch = 0); void setMinAddress(UInt_t trbnetaddress) { fMinAddress=trbnetaddress; } void setMaxAddress(UInt_t trbnetaddress) { fMaxAddress=trbnetaddress; } void shiftTimes(Double_t ts) { fTimeShift =ts;} protected: void clearAll(); virtual Bool_t decodeData(UInt_t trbaddr, UInt_t n, UInt_t * data); ClassDef(HTrb3TdcUnpacker,0); // Unpacker for TRB3 FPGA TDC }; #endif /* !HTRB3TDCUNPACKER_H */